I am currently a PhD student in Algorithmic Program Verification at Uppsala University. I got an MSc in Computer Science from the Dept. of Information Technology at the same university.
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Contact details: Yunyun Zhu
Research
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I am working on verifying cache coherence protocols for multi-core systems. In a multicore system a finite number of caches are used to efficiently make data available for processors. Since there can be several processors each with its own cache(s), protocols are needed to organize the access to the shared memory. We attempt to verify the correctness (e.g., safety and liveness) properties of the protocols with arbitrary number of varaibles and/or processors.
My supervisors are Parosh Abdulla, Bengt Jonsson
and Mohamed Faouzi Atig
Publications
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Verifying Safety and Liveness for the FlexTM Hybrid Transactional Memory, Parosh Aziz Abdulla, Sandhya Dwarkadas, Ahmed Rezine, Arrvindh Shriramanx and Yunyun Zhu, DATE 2013
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Verification of Cache Coherence Protocols wrt. Trace Filters, Parosh Aziz Abdulla, Mohamed Faouzi Atig, Zeinab Ganjei, Ahmed Rezine and Yunyun Zhu, FMCAD 2015
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Fencing Programs with Self-Invalidation and Self-Downgrade, Parosh Aziz Abdulla, Mohamed Faouzi Atig, Stefanos Kaxiras, Carl Leonardsson, Alberto Ros and Yunyun Zhu, FORTE 2016
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Mending Fences with Self-Invalidation and Self-Downgrade, Parosh Aziz Abdulla, Mohamed Faouzi Atig, Stefanos Kaxiras, Carl Leonardsson, Alberto Ros and Yunyun Zhu, Logical Methods in Computer Science 14(1) (2018)
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