| Name | Arnold Neville Pears |
| Address | 55 Jessie St, Preston West 3072 Victoria, Australia |
| Age | 34 |
| Sex | Male |
| Marital Status | Single |
| Contact via | Office: +61 3 9479 1144 Home: +61 3 9478 9167 FAX: +61 3 9479 3060 E-Mail: pears@cs.latrobe.edu.au |
I am a member of the IEEE, ACM, Society of Computer Simulation (SCS), and the International Association of Science and Technology for Development (IASTED). I am also a member of the Unix User Group of Victoria, and I have served on their committee, and as conference organiser for the 1996 Summer Technical Conference. I am currently a member of the programme committee of the International Conference on Computer Simulation, and on the organising committee of the (SCS) High Performance Computing Symposium '99.
[1991- present] Tenured Senior Lecturer, La Trobe University, Melbourne, Australia
Duties:
[1987-1990] Tutor and Laboratory Demonstrator (La Trobe University)
Duties:
[1987] Research Assistant (La Trobe University, Concurrency Research Group)
[1986] C.S.I.R.O. D.I.T Melbourne Vacation Scholarship
In addition to teaching duties I acted as course adviser and course
co-ordinator for the Department's engineering and computer accounting courses
in the period (1991--1995).
Duties involved include,
During 1997 and 1998 I was appointed to the position of third year coordinator,
with responsibility for the management of all third year subjects in the
Department. In this capacity I schedule assignment due dates for approximately
twenty third year subjects, manage the allocation of casual teaching staff
to courses and manage the budget for casual teaching appointments.
I am a member of the University Student Loans application committee, which
manages and approves student loans for study related expenses. This involves
twelve meetings per hear to consider loan applications and prepare policies
and strategy papers for submission to the Standing Committee for Student
Loans.
I have been actively involved in teaching at La Trobe throughout my employment there. I have a strong interest in teaching and curriculum development, and a paper on curriculum design for parallel computing courses using simulation appeared in the International Symposium on Parallel Computing Curricula in 1995. The following sections provide an overview of my teaching contributions at La Trobe during my period of employment.
CSE1SCPP:
A first year level intensive programming course designed to provide basic
computing skills to students undertaking a postgraduate diploma in computer
science.
Syllabus: Data types, control structures, input/output functions, recursion,one-dimensional arrays and strings, multi-dimensional arrays, structures, memory allocation, files, pointers, abstract data types, and sorting and searching applications.
Format: Twenty eight (28) three hour sessions, comprising a one hour lecture and a 2 hour laboratory class emphasising practical experience.
Contribution: I have been actively involved in developed the syllabus for this course to maintain relevance and ensure state of the art presentation of the material. I wrote the lecture series, presented the course between 1991-1998, and co-authored a set of laboratory manuals and programming examples totalling some 150 pages of text.
CSE10CPP:
The Department's first year course introducing computers, peripheral devices,
numerical representation, algorithm design techniques, and basic software
engineering principles.
Syllabus: Definition of a computer, hardware components, bus, memory, cpu. Data forms, analogue, digital, representation of numbers and characters (ASCII), fixed and floating point representation, two's complement arithmetic, assembly language. Techniques for algorithm development and software engineering, refinement, top down design, pseudocode, reuse.
Format: Sixteen one hour lectures with eight two hour laboratories, and approximately eight one hour tutorials.
Contribution: Development of a lecture series and presentation of that lecture series in 1992-1994. I was also closely involved in the complete revamp of the course to teach C++ in 1996. The course was restructured and all the materials were rewritten for interactive presentation using PowerPoint. A significant aspect of this contribution was the development of animations to illustrate code functionality and diffcult computer science concepts.
CSE31PAR:
Third year introductory course in parallel programming languages, models,
tools, techniques, and architectures.
Syllabus: Basic concepts, speedup, interference, interleaving, non-determinism, starvation, fairness, invoking and controlling parallelism, barriers, semaphores, conditional critical regions, monitors, engineering parallel applications. Tools, petri nets, definition, use, reachability trees, folding, and analysis. Hardware, Flynn taxonomy, network and shared memory machines, RPC, message passing, dataflow, SISAL, VAL.
Format: Twenty one hour lectures and nine one hour tutorials/practical classes.
Contribution: Developement of the lecture series and its revision over the last few years to include important new developments in the area. Support material includes a complete set of lecture notes and multimedia course presentation using a combination of online demonstrations, PowerPoint, and class exercises. I am currently reworking the lecture notes into a textbook on practical parallel programming. I have taught the course over the period 1991-present.
CPPCON: A fourth year (honours) level course on concurrent computing models, techniques, and programming languages.
Syllabus: The course is divided into three sections of lectures
containing six hours each.
Section one covers programming models, distributed, single address space,
Linda, CSP, SR. Programming techniques, RPC, Rendezvous, Client-Server,
processor farms, etc.
Section two examines program validation, program proving via predicate
calculus and temporal logic.
Section three examines three architecture designs, DASH, DDM, and Connection
Machine.
Format: Nine two hour lectures with eight one hour student seminars.
Contribution: The course concentrates on developing a practical and theoretical understanding of some of the major areas of parallel software development. To achieve these objectives the course discusses the major distributed and shared memory programming models and attempts to engage students in actively evaluating aspects of these areas. Each student prepares and submits for marking a class paper, and also presents a seminar on the class paper topic. This encourages the students to take an active role in their appreciation of this area of computing.
Staff teaching performance is assessed at the end of every course via a survey which is completed by the students who attended. The feedback from these surveys on my courses has been uniformly good to excellent. A report containing a detailed analysis of my teaching evaluations can be made available if required.
Details of student supervision at various levels are given below.
Unfortunately, due to the employability of Computer Science and Computer
Engineering graduates, I have had limited opportunities to attract postgraduate
students. Despite this, I have maintained an active research profile, and
I am a popular Honours supervisor.
Honours Projects
1992
T. Phung, "Implementing RPC for Modula-P", Fail
M. de Rijk, "A study of limited directory cache coherence schemes
on multicomputers", H1
1993
E. Braddock, "A Study of the Cube Connected Cycles", H1
J. Fulton, "An Investigation of Multicomputer Cache Consistency
Strategies", H1
J. Cleeve, "Analysis of Chordal Ring Interconnection Networks"
, H1
1994
N. Wagon, "Parallel Ray Tracing", H1
K. Shaker, "Visualising Multicomputer Performance Data", H2A
D. Grant, "The Impact of Barrier Implementations on DSM Programs",
H1
N. Mai, "Efficient Execution Driven Multicomputer Simulation",
H1
1995
P. Perera, "Object Oriented Simulation of MIN's", H2B
D. O'Donnell, "Object Oriented Simulation of Multiprocessors",
H1
1996
B. Leach, "Intranetwork document management with Gossamer",
H1
J. Hansen, "Using WWW Document Classes to improve Browser Cache Performance",
H1
A. Keecha, "Evaluating the Hierarchical Cubic Network", H2A
1997
M. Barry, "Intranet document consistency protocols", H1
M. Ojczyk, "Using OBJECTSIM to model a high speed object recognition
architecture", H1
K. Leins, "Parallel Face Recognition", H1
1998
N. Thong, "An Empirical Evaluation of the HCN Network",
H. Diab, "Multiprocessor Network Perormance Data Visualisation",
J. Nevile, "Using Dossiers to Improve Parallel Program Performance",
MSc( Coursework )
M. D. Hodgson, "An OO Parallel Discrete Event Simulation Kernel",
completed 1996.
D. Burden, "An evaluation of Java as a vehicle for realising OO designs",
continuing.
M. de Rijk & Evaluating Weak Memory Consistency Protocols", continuing.
MSc Research
D. P. Barton & Distributed Genetic Algorithms, withdrew 1995
From 1988 to 1992 I conducted my research in conjunction with Dr. Francis with the intention of obtaining my PhD. The principal focus of this research was to investigate architecture and operating sytem inovations that had the potential to improve the performance of Distributed Shared Memory (DSM) multiprocessors.
One of the major products of this research were the development of a state of the art execution driven simulation tool capable of simulating large scale DSM multiprocessors. Using this tool to provide performance data estimates I proposed a new DSM architecture design and evaluated a number of design options. The resulting evaluations of network and memory subsystem design alternatives have appeared in a number of international publications. A full list of papers is attached to this application
Since 1993 I have been director of the Concurrency Research Group at La Trobe, and project leader of the departmental Concurrent Systems Simulation Group. I have published widely in the areas of computer architecture and network evaluation. I have lead the research team at La Trobe which developed the OBJECTSIM object oriented simulation methodology. The OBJECTSIM environment and methodology are used at La Trobe and the University of Rouen in France for both research and teaching.
The Concurrency Research Group investigates architecture, operating system and programming language inovations for parallel computer design. The focus of the group is primarily in performance improvement of multiprocessor architectures. Within this area I manage several research programmes which focus on the design and evaluation of network topologies, routing protocols and memory consistency models.
Recent interest in wide scale distributed computing environments, work station clusters, and the World Wide Web (WWW) have significant implications for information management and retrieval. Future research in computer based information management and retrieval needs to address these emerging issues. The Concurrency Research Group at La Trobe is addressing a part of this problem by developing and evaluating new document management protocols. The aim of the research is to identify and exploit the characteristics of documents to provide reliable up to date copies. In this context we are investigating the design of intranet server software to provide on demand document replication. This has the potential to enhance document availability and decrease access delay. At the same time, the protocol needs to manage the copies of a document preventing inconsistencies from arising between multiple copies of critical documents. By defining a range of document classes we can enforce differing levels of consistency depending on the type of document involved and its perceived consistency requirements.
Current projects address
In addition to the research effort described above I am a member of the Concurrent Systems Simulation Group. The Concurrent Systems Simulation Group is a loose grouping of staff at La Trobe and University of Rouen in France. We are interested in developing flexible efficient support for simulations which model the behaviour of computer architectures and networks. Joint work on architecture evaluation between myself, Prof E. Pissaloux (then at Univ de Paris XIII, now at Univ de Rouen) and Dr S. Singh and Prof. T. Dillon (at La Trobe) during 1994, generated substantial interest in devising a new generic method for specifying accurate simulation models of architectures, and networks. In 1995 I commenced work on a collaborative project to specify a new modelling methodology suitable for generic OO based simulation of concurrent systems while on sabbatical at the Univerisity of Paris XIII. The resulting OBJECTSIM methodology and discrete event simulation kernel are a significant step towards defining a generic hierarchy of reusable architecture simulation components. I have just returned from a three month visit to France where I was collaborating on the definition of a new architecture for high speed object recognition. My role in the project is modelling and evaluation of the hardware proposal using OBJECTSIM. The hardware is designed to accelerate object identification using a technique called "geometric hashing".
Dr Rhys Francis
C.S.I.R.O.
723 Swanston St,
Carlton 3053
Ph: +61-3-282-2631.
Email: Rhys.Francis@csiro.dit.mel.au
Dr Ian Robinson
Assoc. Dean(Undergraduate),
Faculty of Sci. and Tech.
La Trobe University, Bundoora 3083
Ph: +61-3-479-2107.
Email: ian@latcs1.lat.oz.au
Prof. Tharam Dillon
Head of Department.
Dept. Comp. Sci. & Comp. Eng.
La Trobe University, Bundoora 3083
Ph: +61-3-479-2598.
Email: tharam@latcs1.lat.oz.au
Prof. Edwige Pissaloux
Laboratoire Perception, Systems, Information
UFR des Sciences et Techniques
Place Emile Blondel
76821 Mont Saint Aignan Cedex
France.
Fax: +33 2 35 14 66 18
Email: Edwige.Pissaloux@univ-rouen.fr
R.S. FRANCIS, I.D. MATHIESON, and A.N. PEARS, ``Compiler Integrated Multiprocessor Simulation'', Int. Journal in Computer Simulation. Vol 1, No 2, pp. 169-188, 1991.
Pears, A. N. and Barton D. P., "Evolutionary Computation: Applications and Techniques", Neural Network World Journal, 1996.
Pears A. N., "Odin: A Single Address Space Multiprocessor Design." IASTED International Journal of Modelling and Simulation, Submitted Dec 1996, revised and re-submitted Sept 1997.
R.S. FRANCIS, and A.N. PEARS, ``An Error Recovery Tool for Yacc'', ACSC-12, 1989.
A.N. PEARS, and R.S. FRANCIS, ``Enhanced Error Processing for UNIX parsers'', AUUG-89, pp. 127--139.
R.S. FRANCIS, and A.N. PEARS, ``Self Scheduling and Execution Threads '', IEEE Symp on Parallel and Distributed Processing, 1990, pp. 586--590.
R.S. FRANCIS, I.D. MATHIESON, A.N. PEARS, L.J.H. PANNAN, and J. ETHERIDGE, ``Implications of Execution Threads for Multi-User Multiprocessors'', ACSC-13, 1990.
A.N. PEARS, and R.S. FRANCIS, ``Execution Implications of Distributed Shared Virtual Memory'', AUUG-90, pp. 183--194.
A.N. PEARS, and R.S. FRANCIS, ``On the Plausibility of Distributed Virtual Memory'', ACSC-14 pp. 28-1 to 28-11 Feb 1991.
A.N. PEARS, and R.S. FRANCIS, ``How Much Consistency is a Good Thing?'', ACSC-16, Feb 1993, pp. 301--310.
A.N. PEARS, and R.S. FRANCIS, ``Barrier Semantics in Very Weak Memory'', 5th Int. PARLE'93 Conf., Munich, June 1993, Lecture Notes in Computer Science 694, pp. 728--731.
A.N. PEARS, and R.S. FRANCIS, ``Execution Driven Multicomputer Simulation: The DiST Experience'', 2nd Int. Conf. on Modelling and Simulation, Vic. Uni. of Tech., Melb. 1993, pp. 29--38.
A.N. PEARS, ``Using the DiST Simulator to Teach Parallel Computing Concepts'', International Forum on Parallel Computing Curricula, Wellesley College, Wellesley MA, March 31- April 1 1995.
A.N. Pears, and D.P Barton, "Applications of Evolutionary Computation", Proceedings MENDEL'95 Int. Conf. on Genetic Algorithms, Brno, Czech Republic, Sept 26-28, 1995, pp. 15-21.
Pears, A. N., Pissaloux, E., Singh, S., Hodgson, M., and Dillon, T. S., "OBJECTSIM: THE CONCEPTUAL MODEL OF A GENERIC PARALLEL & DISTRIBUTED COMPUTER SYSTEM SIMULATOR." Int. Conf. on High Perf. Computing, HPC'96, Part of 1996 Simulation Multi-Conference, April 8--11, 1996, New Orleans, Louisiana, pp. 308-313.
Pears, A. N., Pissaloux, E., Singh, S., Dillon, T. S., Hodgson, M., Sharma, N., and Ghosh, S., "OBJECTSIM - CONCEPTUAL MODELLING TOWARDS A GENERIC PARALLEL & DISTRIBUTED COMPUTER SYSTEM SIMULATOR." Conf on Simulation Technology and Training, SimTecT'96, March 25-26, 1996, Melbourne, Australia, pp. 65-70.
Pears A. N., "Odin: Implications and Performance of a Novel DSM Design." 11th International Conference on Systems Engineering (ICSE'96), University of Nevada, Las Vegas, 9-11 July 1996, pp.572-577.
Pears A. N., "Odin: Design and Evaluation of a Single Address Space Multiprocessor." IASTED International Conference on Modelling and Simulation, Sheraton Hotel, Station Square, Pittsburgh, PA, 25-27 April 1996, pp. 57-62.
A.N. PEARS, M. DERIJK, and N. WAGON, ``A Forgetful Weak Consistency Protocol'', Aust. UNIX User Group Summer Conf., Melbourne University, Victoria, Australia, Mar 26, 1996, pp. 1-12.
A.N. PEARS, and E. PISSALOUX, ``Using Hardware Assisted Geometric Hashing for High Speed Target Acquisition an d Guidance.'', AeroSense'97, 22-25 April 1997, Orlando Florida, USA, pp. 312-320.
A.N. PEARS, S. SINGH and T. S. DILLON, ``A New Approach to Object Oriented Simulation of Concurrent Systems'', AeroSense'97, 22-25 April 1997, Orlando Florida, USA, pp.
A.N. Pears and M. Ojczyk, "Performance Analysis of a Parallel Target Recognition Architecture" SPIE AeroSense Conference, Paper 3371-50, Orlando, Florida, 13--17 April 1998.
A.N. Pears and K. Shaker, "Visualising Algorithm Performance on Parallel Architectures" HPC'98 Conference, Boston, MA, 5--9 April 1998, pp. 305--310.
A.N. Pears and K. Leins, " A Parallel Approach to Face Recognition using IR Images" SPIE AeroSense Conference, Orlando, Florida, 13--17 April 1998.
A.N. Pears and M. Ojczyk, "Using OBJECTSIM to Model a Parallel Target Recognition Architecture" Int. Conf on Simulation Technology and Training, SimTecT'98, March 2--6, 1998, Adelaide, Australia. pp. 67--72.
In Press
A.N. Pears, M. L. Ojczyk, and E. Pissaloux, "The Design of a High Performance Object Recognition Architecture", Int. Conf. on High Perf. Computing (HPC'99), San Diego, California April 11 - 15, 1999, To Appear.
A.N. Pears and N. Thong, "An empirical Evaluation of the Hierarchical Folded Network", Int. Conf. on High Perf. Computing (HPC'99), San Diego, California April 11 - 15, 1999, To Appear.
In Preparation
A.N. Pears and H. Diab, "A Unified Object Oriented Architecture for Simulation and Data Visualisation"
A.N. Pears, M. Barry and B. Leach "Gossamer: An approach to reliable WWW entity management"
A.N. Pears, "OBJECTSIM V0.3 User Guide", Technical Manual.
Pears A. N., "Odin: A Single Address Space Multiprocessor Design." IASTED International Journal of Modelling and Simulation, Submitted Dec 1996, revised and re-submitted Sept 1997.
A.N. PEARS, ``Applications of Parallelism to Computer Graphics'', Honours Thesis, La Trobe University, 1987.
A.N. PEARS, ``Odin: A Study in Single Address Space Multi-Computing'', PhD. Thesis, La Trobe University, Melbourne, Dec 1993.
R.S. FRANCIS, and A.N. PEARS, ``Error Recovery in a Lex--Yacc Parser'', La Trobe Comp Sci Technical Report, TR #11--88.
R.S. FRANCIS, A.N. PEARS, I.D. MATHIESON, L.J.H. PANNAN, and J. ETHERIDGE, ``Thread and Iterative Parallelism in Multi-User Multiprocessors'', La Trobe Comp Sci Technical Report, TR #14--89.
A.N. PEARS, and R.S. FRANCIS, ``Preserving Barrier Semantics in Loosely Coherent Memory Systems'', La Trobe University, CS-TR-15/94.
A.N. PEARS, and R.S. FRANCIS, ``Odin: Performance of a DSM Design'', La Trobe University, CS-TR-17/94.