Zoran Radovic, M.Sc., Ph.D. Mobile: +1-408-338-7226 I am currently working at Sun Microsystems, Inc.

Welcome to my Home Page! I am a graduate of Information Technology department's Ph.D. program at Uppsala University, where I was a member of the Uppsala Architecture Research Team (UART), which is directed by Prof. Erik Hagersten.

Research

My research interests are in the area of computer architecture, primarily the design of future high-performance clusters of multiprocessors. I am also interested in synchronization techniques, the compiler and code instrumentation technology, operating and run-time systems, and opportunities for software-hardware cooperation.

Research Projects

• 
  Low Latency Distributed Software-Based Shared Memory

• NUCA Synchronization: RH Lock, HBO Locks
  Scalable synchronization algorithms for Nonuniform Communication Architectures (NUCAs), such as CC-NUMAs built from a few large nodes or from chip multiprocessors (CMPs).

Patents

• Multiprocessing Systems Employing Hierarchical Spin Locks. In collaboration with Erik Hagersten. Filed April 2003.

• United States Patent 7,080,213: System and Method for Reducing Shared Memory Write Overhead in Multiprocessor Systems. In collaboration with Oskar Grenholm and Erik Hagersten. Filed December 2002.

• United States Patent 6,985,984: Multiprocessing Systems Employing Hierarchical Back-off Locks. In collaboration with Erik Hagersten. Filed November 2002.

Publications and Presentations

• TMA: A Trap-Based Memory Architecture by Håkan Zeffer, Zoran Radovic, Martin Karlsson, and Erik Hagersten. In Proceedings of the 20th ACM International Conference on Supercomputing (ICS 2006), Queensland, Australia, June 2006.

• Exploiting Locality: A Flexible DSM Approach by Håkan Zeffer, Zoran Radovic, and Erik Hagersten. In Proceedings of the 20th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2006), Rhodes Island, Greece, April 2006.

• Software Techniques for Distributed Shared Memory by Zoran Radovic. PhD thesis, Department of Information Technology, Uppsala University, November 2005.
  
  Slides: phd-seminar.ppt (1.9 MB)

• TMA: A Trap-Based Memory Architecture by Håkan Zeffer, Zoran Radovic, Martin Karlsson, and Erik Hagersten. Technical Report 2005-015, Department of Information Technology, Uppsala University, May 2005.

• Flexibility Implies Performance by Håkan Zeffer, Zoran Radovic, and Erik Hagersten. Technical Report 2005-013, Department of Information Technology, Uppsala University, April 2005.

• Exploiting Spatial Store Locality through Permission Caching in Software DSMs by Håkan Zeffer, Zoran Radovic, Oskar Grenholm, and Erik Hagersten. In Proceedings of the 10th International Euro-Par Conference (Euro-Par 2004), Pisa, Italy, August 2004.

• Evaluation, Implementation and Performance of Write Permission Caching in the DSZOOM System by Håkan Zeffer, Zoran Radovic, Oskar Grenholm, and Erik Hagersten. Technical Report 2004-005, Department of Information Technology, Uppsala University, February 2004.

• Efficient Synchronization and Coherence for Nonuniform Communication Architectures by Zoran Radovic. Licentiate Thesis 2003-008, Department of Information Technology, Uppsala University, September 2003.
  
  Slides: lic-seminar.ppt (2.3 MB)

• THROOM - Supporting POSIX Multithreaded Binaries on a Cluster by Henrik Löf, Zoran Radovic, and Erik Hagersten. In Proceedings of the 9th International Euro-Par Conference (Euro-Par 2003), Klagenfurt, Austria, August 2003.

• Latency-hiding and Optimizations of the DSZOOM Instrumentation System by Oskar Grenholm, Zoran Radovic, and Erik Hagersten. Technical Report 2003-029, Department of Information Technology, Uppsala University, May 2003.

• THROOM --- Running POSIX Multithreaded Binaries on a Cluster by Henrik Löf, Zoran Radovic, and Erik Hagersten. Technical Report 2003-026, Department of Information Technology, Uppsala University, April 2003.

• Hierarchical Backoff Locks for Nonuniform Communication Architectures by Zoran Radovic and Erik Hagersten. In Proceedings of the Ninth International Symposium on High Performance Computer Architecture (HPCA-9), Anaheim, California, USA, February 2003.
  
  Slides: hpca9.ppt (1.4 MB)

• Efficient Synchronization for Nonuniform Communication Architectures by Zoran Radovic and Erik Hagersten. In Proceedings of Supercomputing 2002 (SC2002), Baltimore, Maryland, USA, November 2002.
  
  Slides: sc2002.ppt (866 kB)

• RH Lock: A Scalable Hierarchical Spin Lock by Zoran Radovic and Erik Hagersten. In Proceedings of the 2nd Annual Workshop on Memory Performance Issues (WMPI 2002), held in conjunction with the 29th International Symposium on Computer Architecture (ISCA29), Anchorage, Alaska, USA, May 2002.
  
  Slides: wmpi2002.ppt (1.2 MB)

• Removing the Overhead from Software-Based Shared Memory by Zoran Radovic and Erik Hagersten. In Proceedings of Supercomputing 2001 (SC2001), Denver, Colorado, USA, November 2001.
  
  Slides: sc2001.ppt (401 kB)

• Implementing Low Latency Distributed Software-Based Shared Memory by Zoran Radovic and Erik Hagersten. In Proceedings of the Workshop on Memory Performance Issues (WMPI 2001), held in conjunction with the 28th International Symposium on Computer Architecture (ISCA28), Göteborg, Sweden, June 2001.
  
  Slides: wmpi2001.ppt (326 kB)

• DSZOOM--Low Latency Software-Based Shared Memory by Zoran Radovic and Erik Hagersten. Technical Report 2001:03, Parallel and Scientific Computing Institute (PSCI), Sweden, April 2001.

• DSZOOM--Low Latency Software-Based Shared Memory by Zoran Radovic. Master's thesis, UPTEC F-00-093, ISSN 1401-5757, School of Engineering, Uppsala University, December 2000.

Teaching

• Spring 2005: Digital Technology and Computer Architecture (1DT157)
• Fall 2004: Computer Architecture (1DT720)
• Spring 2004:
  • Digital Technology and Computer Architecture (1DT157)
  • Computer Architecture (1TT441, 1DT631)
• Spring 2003: Computer Architecture (1TT441)
• Fall 2002: Computer Architecture (1DT631)
• Spring 2002: Algorithms and Data Structures (1TT330)
• Fall 2001: Computer Architecture (1DT631)
• Spring 2001: Computer Architecture (1TT311)
• Spring 2000: Object-Oriented Programming with Java (1DL100)
• Fall 1999:
  • Object-Oriented Programming (2AD512/2AD510)
  • Algorithms and Data Structures DV2 (2AD091)

Miscellaneous/Fun

• My Java experience: Java Boulder Dash

Last modified: Tue Apr 25 14:35:06 MEST 2006 by Zoran Radovic. This page has been accessed 20177 times.