[backport gcc-4.9/trunk r201240 + r201241, fixes ARM wrong-code
 regressions PR57731 and PR57837 from PR19599/r198928; the PR57748
 reference looks bogus and should probably be PR57837 <mikpe@it.uu.se>]

gcc/

2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/arm.md (*sibcall_insn): Remove unnecessary space.

2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	PR target/57731
	PR target/57748
	* config/arm/arm.md ("*sibcall_insn): Replace use of
	Ss with US. Adjust output for v5 and v4t.
	(*sibcall_value_insn): Likewise and loosen predicate on
	operand0.
	* config/arm/constraints.md ("Ss"): Rename to US.

--- gcc-4.8.1/gcc/config/arm/arm.md.~1~	2013-07-29 11:31:25.178183652 +0200
+++ gcc-4.8.1/gcc/config/arm/arm.md	2013-07-29 11:36:27.367889666 +0200
@@ -8536,7 +8536,7 @@ (define_expand "sibcall_value"
 )
 
 (define_insn "*sibcall_insn"
- [(call (mem:SI (match_operand:SI 0 "call_insn_operand" "Cs,Ss"))
+ [(call (mem:SI (match_operand:SI 0 "call_insn_operand" "Cs,US"))
 	(match_operand 1 "" ""))
   (return)
   (use (match_operand 2 "" ""))]
@@ -8547,7 +8547,7 @@ (define_insn "*sibcall_insn"
   else
     {
       if (arm_arch5 || arm_arch4t)
-	return \" bx\\t%0\\t%@ indirect register sibling call\";
+	return \"bx%?\\t%0\\t%@ indirect register sibling call\";
       else
 	return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\";
     }
@@ -8556,8 +8556,8 @@ (define_insn "*sibcall_insn"
 )
 
 (define_insn "*sibcall_value_insn"
- [(set (match_operand 0 "s_register_operand" "")
-       (call (mem:SI (match_operand:SI 1 "call_insn_operand" "Cs,Ss"))
+ [(set (match_operand 0 "" "")
+       (call (mem:SI (match_operand:SI 1 "call_insn_operand" "Cs,US"))
 	     (match_operand 2 "" "")))
   (return)
   (use (match_operand 3 "" ""))]
@@ -8568,7 +8568,7 @@ (define_insn "*sibcall_value_insn"
   else
     {
       if (arm_arch5 || arm_arch4t)
-	return \"bx\\t%1\";
+	return \"bx%?\\t%1\";
       else
 	return \"mov%?\\t%|pc, %1\\t@ indirect sibling call \";
     }
--- gcc-4.8.1/gcc/config/arm/constraints.md.~1~	2013-07-29 11:31:25.178183652 +0200
+++ gcc-4.8.1/gcc/config/arm/constraints.md	2013-07-29 11:34:51.597985929 +0200
@@ -21,7 +21,7 @@
 ;; The following register constraints have been used:
 ;; - in ARM/Thumb-2 state: t, w, x, y, z
 ;; - in Thumb state: h, b
-;; - in both states: l, c, k
+;; - in both states: l, c, k, US
 ;; In ARM state, 'l' is an alias for 'r'
 ;; 'f' and 'v' were previously used for FPA and MAVERICK registers.
 
@@ -388,6 +388,12 @@ (define_memory_constraint "Uw"
 						   0)
 		   && GET_CODE (XEXP (op, 0)) != POST_INC")))
 
+(define_constraint "US"
+ "@internal
+  US is a symbol reference."
+ (match_code "symbol_ref")
+)
+
 ;; We used to have constraint letters for S and R in ARM state, but
 ;; all uses of these now appear to have been removed.
 
@@ -395,8 +401,3 @@ (define_memory_constraint "Uw"
 ;; this wasn't really a valid memory constraint.  Again, all uses of
 ;; this now seem to have been removed.
 
-(define_constraint "Ss"
- "@internal
-  Ss is a symbol reference."
- (match_code "symbol_ref")
-)