[backport gcc-4.8/trunk r196308 <mikpe@it.uu.se>]

gcc/

2013-02-27  Andrey Belevantsev  <abel@ispras.ru>

	PR middle-end/45472
	
	* sel-sched-ir.c (merge_expr): Also change vinsn of merged expr
	when the may_trap_p bit of the exprs being merged differs.

	Reorder tests for speculativeness in the logical and operator.

gcc/testsuite/

2013-02-27  Andrey Belevantsev  <abel@ispras.ru>

	PR middle-end/45472
	* gcc.dg/pr45472.c: New test.

--- gcc-4.7.2/gcc/sel-sched-ir.c.~1~	2012-09-07 11:35:21.000000000 +0200
+++ gcc-4.7.2/gcc/sel-sched-ir.c	2013-03-02 15:57:36.060117996 +0100
@@ -1862,8 +1862,12 @@ merge_expr (expr_t to, expr_t from, insn
   /* Make sure that speculative pattern is propagated into exprs that
      have non-speculative one.  This will provide us with consistent
      speculative bits and speculative patterns inside expr.  */
-  if (EXPR_SPEC_DONE_DS (to) == 0
-      && EXPR_SPEC_DONE_DS (from) != 0)
+  if ((EXPR_SPEC_DONE_DS (from) != 0
+       && EXPR_SPEC_DONE_DS (to) == 0)
+      /* Do likewise for volatile insns, so that we always retain
+	 the may_trap_p bit on the resulting expression.  */
+      || (VINSN_MAY_TRAP_P (EXPR_VINSN (from))
+	  && !VINSN_MAY_TRAP_P (EXPR_VINSN (to))))
     change_vinsn_in_expr (to, EXPR_VINSN (from));
 
   merge_expr_data (to, from, split_point);
--- gcc-4.7.2/gcc/testsuite/gcc.dg/pr45472.c.~1~	1970-01-01 01:00:00.000000000 +0100
+++ gcc-4.7.2/gcc/testsuite/gcc.dg/pr45472.c	2013-03-02 15:57:36.050118034 +0100
@@ -0,0 +1,21 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */
+/* { dg-options "-O -fschedule-insns2 -fselective-scheduling2" } */
+
+struct S
+{
+  volatile long vl;
+  int i;
+};
+struct S s1, s2;
+
+void
+foo (int j, int c)
+{
+  int i;
+  for (i = 0; i <= j; i++)
+    {
+      if (c)
+	s2.vl += s1.vl;
+      s1 = s2;
+    }
+}