[backport from gcc-4.8/trunk r187731 <mikpe@it.uu.se>]

From: Andreas Schwab <schwab at linux-m68k dot org>
Subject: __builtin_clz for m68k
Date: Mon, 21 May 2012 20:44:21 +0200
List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>

This implements clzsi2 for m68k.  It also fixes a bug in the Coldfire
expansion: ff1 (like bfffo) sets ccr from the source operand.  Tested on
m68k-linux and installed on trunk.

Andreas.

gcc/

2012-05-21  Andreas Schwab  <schwab@linux-m68k.org>

	* config/m68k/m68k.md (*clzsi2_cf): Renamed from clzsi2.  Call
	CC_STATUS_INIT.
	(clzsi2): New expander.
	(*clzsi2_68k): New insn.
	* config/m68k/m68k.h: Update comment about
	CLZ_DEFINED_VALUE_AT_ZERO.

--- gcc-4.6.3/gcc/config/m68k/m68k.h.~1~	2010-11-22 02:57:50.000000000 +0100
+++ gcc-4.6.3/gcc/config/m68k/m68k.h	2012-06-09 21:11:39.000000000 +0200
@@ -711,7 +711,7 @@ __transfer_from_trampoline ()					\
 
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 
-/* The ColdFire FF1 instruction returns 32 for zero. */
+/* The 68020 BFFFO and ColdFire FF1 instructions return 32 for zero. */
 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
 
 #define STORE_FLAG_VALUE (-1)
--- gcc-4.6.3/gcc/config/m68k/m68k.md.~1~	2009-12-31 00:03:46.000000000 +0100
+++ gcc-4.6.3/gcc/config/m68k/m68k.md	2012-06-09 21:11:39.000000000 +0200
@@ -4457,12 +4457,33 @@ (define_insn "abs<mode>2_cf"
 
 ;; bit indexing instructions
 
+(define_expand "clzsi2"
+  [(set (match_operand:SI 0 "register_operand" "")
+        (clz:SI (match_operand:SI 1 "general_operand" "")))]
+  "ISA_HAS_FF1 || (TARGET_68020 && TARGET_BITFIELD)"
+{
+  if (ISA_HAS_FF1)
+    operands[1] = force_reg (SImode, operands[1]);
+})
+
+(define_insn "*clzsi2_68k"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (clz:SI (match_operand:SI 1 "general_operand" "do")))]
+  "TARGET_68020 && TARGET_BITFIELD"
+{
+  CC_STATUS_INIT;
+  return "bfffo %1{#0:#0},%0";
+})
+
 ;; ColdFire ff1 instruction implements clz.
-(define_insn "clzsi2"
+(define_insn "*clzsi2_cf"
   [(set (match_operand:SI 0 "register_operand" "=d")
  	(clz:SI (match_operand:SI 1 "register_operand" "0")))]
   "ISA_HAS_FF1"
-  "ff1 %0"
+{
+  CC_STATUS_INIT;
+  return "ff1 %0";
+}
   [(set_attr "type" "ext")])
 
 ;; one complement instructions