[backport r181549 from gcc-4.7/trunk, part 2/2 of ARM PR51442 fix <mikpe@it.uu.se>]

From: "Joey Ye" <joey dot ye at arm dot com>
Subject: [PATCH] Incorrect volatile bitfield load-extend
Date: Thu, 10 Nov 2011 11:57:30 +0800
List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>

Trunk gcc mis-handles following volatile bitfield case on ARM target:

$ cat a.c
extern void check(int);
typedef struct {
  volatile unsigned short a:8, b:8;
} BitStruct;
BitStruct bits = {1, 2};
int main ()
{
  check(bits.a);
  return 0;
}
$ arm-none-eabi-gcc -v 2>&1 |grep "gcc version"
gcc version 4.7.0 20111024 (experimental) [trunk revision 180388] (GCC)=20
$ arm-none-eabi-gcc -S a.c -mthumb -mcpu=cortex-m3
$ grep -v "^\s*\." a.s
bits:
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r7, lr}
	add	r7, sp, #0
	movw	r3, #:lower16:bits
	movt	r3, #:upper16:bits
	ldrh	r3, [r3, #0]	@ movhi
	uxth	r3, r3  // Should be uxtb here. As a result,
                    // the output becomes 2056, instead of 8 as expected
	mov	r0, r3
	bl	check
	mov	r3, #0
	mov	r0, r3
	pop	{r7, pc}

Root cause is that when restrict-volatile-bitfields is enabled, which is ARM
default. Volatile bitfields isn't loaded as bitfield even if bitfield size
is less than load size.

It is actually a regression introduced by:
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01477.html

gcc/

2011-11-20  Joey Ye  <joey.ye@arm.com>

	* expr.c (expand_expr_real_1): Correctly handle strict volatile
	bitfield loads smaller than mode size.

gcc/testsuite/

2011-11-20  Joey Ye  <joey.ye@arm.com>

	* gcc.dg/volatile-bitfields-1.c: New.

--- gcc-4.6.2/gcc/expr.c.~1~	2011-12-10 14:20:50.000000000 +0100
+++ gcc-4.6.2/gcc/expr.c	2011-12-10 14:25:49.000000000 +0100
@@ -9189,11 +9189,16 @@ expand_expr_real_1 (tree exp, rtx target
 		&& modifier != EXPAND_CONST_ADDRESS
 		&& modifier != EXPAND_INITIALIZER)
 	    /* If the field is volatile, we always want an aligned
-	       access.  Only do this if the access is not already naturally
+	       access.  Do this in following two situations:
+	       1. the access is not already naturally
 	       aligned, otherwise "normal" (non-bitfield) volatile fields
-	       become non-addressable.  */
+	       become non-addressable.
+	       2. the bitsize is narrower than the access size. Need
+	       to extract bitfields from the access.  */
 	    || (volatilep && flag_strict_volatile_bitfields > 0
-		&& (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
+		&& (bitpos % GET_MODE_ALIGNMENT (mode) != 0 
+		    || (mode1 != BLKmode
+		        && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
 	    /* If the field isn't aligned enough to fetch as a memref,
 	       fetch it as a bit field.  */
 	    || (mode1 != BLKmode
--- gcc-4.6.2/gcc/testsuite/gcc.dg/volatile-bitfields-1.c.~1~	1970-01-01 01:00:00.000000000 +0100
+++ gcc-4.6.2/gcc/testsuite/gcc.dg/volatile-bitfields-1.c	2011-12-10 14:25:49.000000000 +0100
@@ -0,0 +1,23 @@
+/* { dg-options "-fstrict-volatile-bitfields" } */
+/* { dg-do run } */
+
+extern int puts(const char *);
+extern void abort(void) __attribute__((noreturn));
+
+typedef struct {
+  volatile unsigned short a:8, b:8;
+} BitStruct;
+
+BitStruct bits = {1, 2};
+
+void check(int i, int j)
+{
+  if (i != 1 || j != 2) puts("FAIL"), abort();
+}
+
+int main ()
+{
+  check(bits.a, bits.b);
+
+  return 0;
+}