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Lecture 5 index page


The papers can be found in the margin to the left

P1 Tony Werner and Venkatesh Akella, Asynchronous Processor Survey, IEEE Computer, November 1997, pp. 67-77

P2 Alain J. Martin, Mika Nyström, Catherine G. Wong, Three Generations of Asyncronous Microprocessors, IEEE Design & Test of Computers, special issue on Clockless VLSI Design, Nov 2003

P3 Pradip Bose, David M. Brooks, Viji Srinivasan, Philip G. Emma, Power-Performance and Power Swing Characterization in Adaptive Microarchitechures, IBM TR RC22362, 2002.

P4 Canal, R.; Parcerisa, J.-M.; Gonzalez, A.; A cost-effective clustered architecture, Parallel Architectures and Compilation Techniques, 1999. Proceedings. 1999 International Conference on , 12-16 Oct. 1999

P5 Efficient interconnects for clustered microarchitectures Parcerisa, J.-M.; Sahuquillo, J.; Gonzalez, A.; Duato, J.; Parallel Architectures and Compilation Techniques, 2002. Proceedings. 2002 International Conference on , 22-25 Sept. 2002

P6 Jessica H. Tseng, Krste Asanovic, Banked Multiported Register Files for High-Frequency Superscalar Microprocessors (ISCA 2003)

 

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